R32C117_10 Datasheet, PDF (21/114 Pages) Renesas Technology Corp – RENESAS MCU

R32C/117 Group
1. Overview
1.5 Pin Definitions and Functions
Table 1.16 to Table 1.20 show the pin definitions and functions.
Table 1.16 Pin Definitions and Functions (1/4)
Function
Power supply
Connecting pins
for decoupling
capacitor
Analog power
supply
Reset input
CNVSS
Debug port
Symbol
VCC, VSS
VDC0, VDC1
AVCC, AVSS
RESET
CNVSS
NSD
Main clock input XIN
Main clock output XOUT
Sub clock input XCIN
Sub clock output XCOUT
BCLK output
Clock output
BCLK
CLKOUT
External interrupt _{INT0 to INT8} ⁽¹⁾
input
NMI input
P8_5/NMI
Key input interrupt KI0 to KI3
Bus control pins D0 to D7
D8 to D15
D16 to D31 ⁽²⁾
A0 to A23
A0/D0 to A7/D7
A8/D8 to
A15/D15
I/O
Description
I Applicable as follows: VCC = 3.0 to 5.5 V, VSS = 0 V
A decoupling capacitor for internal voltage should be
— connected between VDC0 and VDC1
I
Power supply for the A/D converter. AVCC and AVSS
should be connected to VCC and VSS, respectively
I The MCU is reset when this pin is driven low
I This pin should be connected to VSS via a resistor
I/O
This pin is to communicate with a debugger. It should be
connected to VCC via a resistor of 1 to 4.7 kΩ
I
Input/output for the main clock oscillator. A crystal, or a
ceramic resonator should be connected between pins XIN
and XOUT. An external clock should be input at the XIN
O _{while leaving the XOUT open}
I
Input/output for the sub clock oscillator. A crystal oscillator
should be connected between pins XCIN and XCOUT. An
external clock should be input at the XCIN while leaving the
O _{XCOUT open}
O BCLK output
O
Output of the clock with the same frequency as low speed
clocks, f8, or f32
I ^{Input for external interrupts}
I Input for NMI
I Input for the key input interrupt
I/O
Input/output of data (D0 to D7) while accessing an external
memory space with a separate bus
I/O
Input/output of data (D8 to D15) while accessing an
external memory space with 16-bit or 32-bit separate bus
I/O
Input/output of data (D16 to D31) while accessing an
external memory space with 32-bit separate bus
O Output of address bits A0 to A23
Output of address bits (A0 to A7) and input/output of data
I/O (D0 to D7) by time-division while accessing an external
memory space with multiplexed bus
Output of address bits (A8 to A15) and input/output of data
I/O (D8 to D15) by time-division while accessing an external
memory space with 16-bit or 32-bit multiplexed bus
Notes:
1. Pins INT6 to INT8 are available in the 144-pin package only.
2. Pins D16 to D31 are available in the 144-pin package only.
REJ03B0254-0110 Rev.1.10
Jun 23, 2010
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