HD49334AF Datasheet, PDF (21/23 Pages) Renesas Technology Corp – CDS/PGA & 10-bit A/D Converter

HD49334AF/AHF
Example of Recommended External Circuit
• At CDS Input
C12 C11
0.1 0.1
R10 100
R11 100
R12 100
R13 100
R14 100
C10
0.1
24 23 22 21 20 19 18 17 16 15 14 13
from
Timing generator
from CCD out
C14 0.1
C1
1µ
C3*² 1 µ
C4*¹
R15 33 k
C15 0.1
25 AV_SS
26 AV_SS
27 AV_DD
28 BLKSH
29 BLKFB
30 CDSIN
31 BLKC
32 BIAS
33 AV_DD
34 NC
35 AV_SS
36 ADCIN
HD49334AF/AHF
(CDS/PGA+ADC)
NC 12
D9 11
D8 10
D7 9
D6 8
D5 7
D4 6
D3 5
D2 4
D1 3
D0 2
NC 1
to
Camera
signal
processor
L2
37 38 39 40 41 42 43 44 45 46 47 48
47 µ
L1
47 µ
3.0 V
C16
47/6
C17 C18 C19
0.1 0.1 0.1
C21 C22
0.1 0.1
C21
47/6
GND
Serial data input
Notes: 1. For C4, see table 5.
2. For C3, see page 8 "DC Offset Compensation Feedback Function".
• At ADC Input
C12 C11
0.1 0.1
from
Timing generator
24 23 22 21 20 19 18 17 16 15 14 13
C14 0.1
R15 33 k
C15 0.1
with ADC input
C2 2.2/16
25 AV_SS
26 AV_SS
27 AV_DD
28 BLKSH
29 BLKFB
30 CDSIN
31 BLKC
32 BIAS
33 AV_DD
34 NC
35 AV_SS
36 ADCIN
HD49334AF/AHF
(CDS/PGA+ADC)
NC 12
D9 11
D8 10
D7 9
D6 8
D5 7
D4 6
D3 5
D2 4
D1 3
D0 2
NC 1
37 38 39 40 41 42 43 44 45 46 47 48
to
Camera
signal
processor
L2
47 µ
L1
47 µ
3.0 V
C16
47/6
C17 C18 C19
0.1 0.1 0.1
C21 C22
0.1 0.1
Note: External circuit is same as above except for ADC input.
C21
47/6
GND
Serial data input
Unit: R: Ω
C: F
Rev.1.0, Apr 20, 2004, page 21 of 22