M30245_06 Datasheet, PDF (205/367 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M16C/20 SERIES

M30245 Group
2. USB function
q USB endpoint x(x=1 to 4) IN control and status register
•IN_BUF_STS1, IN_BUF_STS0 flags
These flags indicate IN FIFO state.
At the time of writing the data to be transmitted to the host PC in IN FIFO, read these flags to confirm
the IN FIFO state.
They are respectively set to “112” at the time of resetting. When the corresponding endpoint be-
comes enable state from disable state, the IN_BUF_STS1 and the IN_BUF_STS0 flags are respec-
tively cleared to “002”, automatically. When they are “002”, there are no data in IN FIFO. When they
are respectively set to “012”, there are only one buffer data in double buffer (Invalid for single buffer) .
When they are respectively set to “112”, there are no space in IN FIFO. (There are one buffer data in
single buffer while there are two buffer data in double buffer.) When they are respectively set to “102”,
it is invalid.
These flags are updated when one of the following events occurs:
- One buffer data of IN FIFO is successfully transmitted to the host PC.
- One buffer data is successfully prepared in IN FIFO
SET_IN_BUF_RDY bit is set to “1” when writing of one transmit data to the IN FIFO completes. Or,
at the time of AUTO_SET enable, when the data count equal to the EPxIMP (or the BUF_SIZ in
continuous transfer enable) has been written in the FIFO. However, when a short packet has been
written at the time of AUTO_SET enable, these flags are not automatically updated. In such cases,
set SET_IN_BUF_RDY bit to “1” by software.
- One buffer data is flushed.
•UNDER_RUN flag
This flag indicates occurrence of an underrun in isochronous transfer. The bit is valid only in isochro-
nous IN transfer. When there are no data packet in IN FIFO at start of the IN token from the host
CPU, occurrence of an underrun is recognized and this flag is set to “1”. This flag is cleared to “0” by
setting “1” to CLR_UNDER_RUN bit .
•SET_IN_BUF_RDY bit
This bit controls IN FIFO. When there is a space in IN FIFO (when IN_BUF_STS1, IN_BUF_STS0=“002”
in single buffer, or IN_BUF_STS1, IN_BUF_STS0=“002” or “012” in double buffer enable), data can
be written in the IN FIFO. One transmit data is prepared by setting this bit to “1” after writing the
transmit data to the IN FIFO. (To transmit an empty packet, set this bit to “1” without writing any data.)
When this bit is set to “1”, the completion of one transmit data ready is notified to the USB function
control unit and, simultaneously, the IN FIFO status (IN_BUF_STS1, IN_BUF_STS0 flags) is up-
dated. In the AUTO_SET enable, when a short packet (data whose size is smaller than the EPxIMP
value in continuous transfer disable or the BUF_SIZ value in continuous transfer enable) has been
written, the IN_BUF_STS1 and IN_BUF_STS0 flags are not automatically updated. In this case, set
this bit to “1”.
Rev.2.00 Oct 16, 2006 page 196 of 354
REJ09B0340-0200