RNA62782LP_15 Datasheet, PDF (2/5 Pages) Renesas Technology Corp – CMOS System Reset IC

RNA62782LP
Pin Arrangement
GND
1
SUB
2
5
OUT
Target Specification
N.C.
3
4
(Top view)
VDD
Mark Indication
RNA62782LP (Example)
Type code Control code
3T
MPAK-5
Control code
Starting in January "A", "B", "C", "D", "E", "F", "G", "H", "J", "K", "L", "M"
Pin Description
Pin No.
1
2
Pin Name
GND
SUB
3
N.C.
4
VDD
5
OUT
I/O
Function
—  Ground
—  TAB is connected to inside.
 Same as 1 pin and ground.
—  No Connection
—  Sorcing power-supply voltage. (To detect this voltage)
O  Power-supply voltage reaches the value below the detection voltage, low is
output
 Open drain output
 Range pull-up resistance: 2.2(k) to 100(k)
R03DS0054EJ0202 Rev.2.02
Mar 01, 2013
Page 2 of 4