RJK6024DPD_15 Datasheet, PDF (2/7 Pages) Renesas Technology Corp – 600V - 0.4A - MOS FET High Speed Power Switching

RJK6024DPD
Preliminary
Electrical Characteristics
(Ta = 25°C)
Item
Symbol Min
Typ
Max Unit
Test conditions
Drain to source breakdown voltage
Zero gate voltage drain current
Gate to source leak current
Gate to source cutoff voltage
Static drain to source on state
resistance
V_(BR)DSS
600
—
—
V I_D = 10 mA, V_GS = 0
I_DSS
—
—
1
A V_DS = 600 V, V_GS = 0
I_GSS
—
—
±0.1 A V_GS = 30 V, V_DS = 0
V_GS(off)
3
—
5
V V_DS = 10 V, I_D = 1 mA
R_DS(on)
—
28
42
 I_D = 0.2 A, V_GS = 10 V ^Note3
Input capacitance
Output capacitance
Reverse transfer capacitance
Ciss
—
37.5
—
pF V_DS = 25 V
Coss
—
7.5
—
pF ^VGS ^{= 0}
Crss
—
0.9
—
pF ^{f = 1 MHz}
Turn-on delay time
Rise time
Turn-off delay time
Fall time
t_d(on)
t_r
t_d(off)
t_f
—
30
—
ns I_D = 0.2 A
—
14.5
—
ns ^VGS ^{= 10 V}
—
48
—
ns ^{RL = 1500 }
—
77
—
ns ^{Rg = 10 }
Total gate charge
Gate to source charge
Gate to drain charge
Qg
—
4.3
—
nC V_DD = 480 V
Qgs
—
0.5
—
nC ^VGS ^{= 10 V}
Qgd
—
3.2
—
nC ^{ID = 0.15 A}
Body-drain diode forward voltage
V_DF
—
0.85
1.45
V I_F = 0.4 A, V_GS = 0 ^Note3
Body-drain diode reverse recovery time
t_rr
—
230
—
ns I_F = 0.4 A, V_GS = 0
di_F/dt = 100 A/s
Notes: 3. Pulse test
4. Since this device is equipped with high voltage FET chip (V_DSS 600 V), high voltage may be supplied.
Therefore, please be sure to confirm about Electric discharge between Drain terminal and other terminal.
5. This device is sensitive to electrostatic discharge.
It is recommended to adopt appropriate cautions when handling this product.
R07DS0688EJ0200 Rev.2.00
Feb 27, 2012
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