HD74LV574A Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs

HD74LV574A
Pin Arrangement
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
(Top view)
20 V_CC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 CLK
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Conditions
Supply voltage range
V_CC
–0.5 to 7.0
V
Input voltage range*¹
V_I
–0.5 to 7.0
V
Output voltage range*^{1, 2}
V_O
–0.5 to V_CC + 0.5
V Output: H or L
–0.5 to 7.0
V_CC: OFF or Output: Z
Input clamp current
I_IK
Output clamp current
I_OK
–20
mA V_I < 0
±50
mA V_O < 0 or V_O > V_CC
Continuous output current
I_O
±35
mA V_O = 0 to V_CC
Continuous current through
I_CC or I_GND
±70
mA
V_CC or GND
Maximum power dissipation at
P_T
Ta = 25°C (in still air)*³
835
mW SOP
757
TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are
observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Rev.1.00 Feb. 01, 2005 page 2 of 7