HD74LS194A Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – 4-bit Bidirectional Universal Shift Registers

HD74LS194A
Function Table
Inputs
Outputs
Mode
Serial
Clear
Clock
S₁
S₀
Left Right A
Parallel
B
C
D
Q_A
Q_B
Q_C
Q_D
L
X
X
X
X
X
X
X
X
X
L
L
L
L
H
X
X
L
X
X
X
X
X
X
Q_A0
Q_B0
Q_C0
Q_D0
H
H
H
↑
X
X
a
b
c
d
a
b
c
d
H
L
H
↑
X
H
X
X
X
X
H
Q_An
Q_Bn
Q_Cn
H
L
H
↑
X
L
X
X
X
X
L
Q_An
Q_Bn
Q_Cn
H
H
L
↑
H
X
X
X
X
X
Q_Bn
Q_Cn
Q_Dn
H
H
H
L
↑
L
X
X
X
X
X
Q_Bn
Q_Cn
Q_Dn
L
H
L
L
X
X
X
X
X
X
X
Q_Ao
Q_Bo
Q_Co
Q_Do
Notes: 1. H; high level, L; low level, X; irrelevant
2. ↑; transition from low to high level
3. a to d; the level of steady-state input at inputs A, B, C, or D, respectively
4. Q_A0 to Q_D0; the level of Q_A, Q_B, Q_C, or Q_D, respectively before the indicated steady-state input conditions were
established.
5. Q_An to Q_Dn; the level of Q_A, Q_B, Q_C, or Q_D, respectively before the most-recent ↑ transition of the clock.
Block Diagram
Parallel Inputs
A
B
C
D
Mode S1
Control
Inputs ^S0
Shift
Right
Serial
Input
Shift
Left
Serial
Input
Clock
Clear
S QA
CK
R
Clear
S QB
CK
R
Clear
S QC
CK
R
Clear
S QD
CK
R
Clear
QA
QB
QC
QD
Parallel Outputs
Rev.3.00, Jul.15.2005, page 2 of 7