HD74LS174 Datasheet, PDF (2/9 Pages) Hitachi Semiconductor – Hex/Quadruple D-type Flip-Flips(with clear)

HD74LS174 / HD74LS175
Pin Arrangement
HD74LS174
HD74LS175
Clear 1
1Q 2
1D 3
2D 4
2Q 5
3D 6
3Q 7
GND 8
Q _CLR
D ^CK
D _CK
Q ^CLR
D _CK
Q ^CLR
CLR ^Q
CK _D
CK ^D
CLR _Q
CK ^D
CLR _Q
16 V_CC
15 _6Q
14 _6D
13 _5D
12 _5Q
11 _4D
10 _4Q
9 Clock
Clear 1
1Q 2
1Q 3
1D 4
2D 5
2Q 6
2Q 7
GND 8
Q
CLR
CK
Q
D
Q
D
CK
Q CLR
CLR Q
CK
D
Q
D
Q
CK
CLR Q
16 V_CC
15 _4Q
14 _4Q
13 _4D
12 _3D
11 _3Q
10 _3Q
9 Clock
(Top view)
(Top view)
Function Table
Inputs
Outputs
Clear
Clock
D
Q
Q
L
X
X
L
H
H
↑
H
H
L
H
↑
L
L
H
H
L
X
Q₀
Q₀
Notes: 1. H; high level, L; low level, X; irrelevant
2. ↑; transition from low to high level
3. Q₀; the level of Q before the indicated steady-state input conditions were established.
4. Q is applied to HD74LS175 only.
Rev.3.00, Jul.15.2005, page 2 of 8