HD74HC75 Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – Quad. Bistable Latches

HD74HC75
Pin Arrangement
Q0a 1
D0a 2
D1a 3
LEb 4
V_CC 5
D0b 6
D1b 7
Q1b 8
Logic Diagram (1/4)
(Top view)
16 Q0a
15 Q1a
14 Q1a
13 LEa
12 GND
11 Q0b
10 Q0b
9 Q1b
Data
Q
Q
Latch
Enable
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
VCC
–0.5 to 7.0
V
Input / Output voltage
Input / Output diode current
Vin, Vout
IIK, IOK
–0.5 to VCC +0.5
V
±20
mA
Output current
VCC, GND current
IO
±25
mA
ICC or IGND
±50
mA
Power dissipation
Storage temperature
PT
Tstg
500
mW
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00, Oct 06, 2005 page 2 of 7