HD74HC73 Datasheet, PDF (2/8 Pages) Hitachi Semiconductor – Dual J-K Flip-Flops (with Clear)

HD74HC73
Pin Arrangement
1CK 1
1CLR 2
1K 3
V_CC 4
2CK 5
2CLR 6
2J 7
CLR
J
Q
CK
K
Q
K
Q
CK
J
Q
CLR
(Top view)
14 1J
13 1Q
12 1Q
11 GND
10 2K
9 2Q
8 2Q
Logic Diagram (1/2)
CLR
Q
J
CK
CK
Q
K
CK
CK
CK
CK
CK
CK
CK
CK
CK
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
VCC, GND current
Power dissipation
Storage temperature
VCC
Vin, Vout
IIK, IOK
IO
ICC or IGND
PT
Tstg
–0.5 to 7.0
V
–0.5 to VCC +0.5
V
±20
mA
±25
mA
±50
mA
500
mW
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00, Oct 06, 2005 page 2 of 7