HD74HC279 Datasheet, PDF (2/6 Pages) Hitachi Semiconductor – Quad. S-R Latches

HD74HC279
Pin Arrangement
Logic Diagram
R
1R 1
1S1 2
1S2 3
1Q 4
2R 5
2S 6
2Q 7
GND 8
(Top view)
16 VCC
15 4S
14 4R
13 4Q
12 3S2
11 3S1
10 3R
9 3Q
S₁
S2
Q
R
S
Q
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit
Supply voltage range
Input / Output voltage
Input / Output diode current
Output current
V_CC, GND current
Power dissipation
Storage temperature
V_CC
V_IN, V_OUT
I_IK, I_OK
I_O
I_CC or I_GND
P_T
Tstg
–0.5 to 7.0
V
–0.5 to V_CC +0.5
V
±20
mA
±25
mA
±50
mA
500
mW
–65 to +150
°C
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.2.00 Jan 31, 2006 page 2 of 5