HD74ALVCH162270 Datasheet, PDF (2/13 Pages) Hitachi Semiconductor – 12-bit to 24-bit Registered Bus Exchanger with 3-state Outputs

HD74ALVCH162270
Function Table
Inputs
CLK
↑
↑
↑
↑
OEA
H
H
L
L
OEB
H
L
H
L
Output enable
Outputs
A
Z
Z
Active
Active
1B, 2B
Z
Active
Z
Active
Inputs
CLKENA1
X
X
L
L
H
H
H
CLKENA2
H
H
L
L
L
L
H
CLK
A
↑
L
↑
H
↑
L
↑
H
↑
L
↑
H
X
X
A- to-B storage (OEB = L)
Outputs
1B
1B₀ ^{*1, 2}
1B₀ ^{*1, 2}
L ^*2
H ^*2
1B₀ ^*1
1B₀ ^*1
1B₀ ^*1
2B
2B₀ ^*1
2B₀ ^*1
L
H
L
H
2B₀ ^*1
Note: This functional table describes the case of transferring the same data for A to 1B path. For the case
of transferring different data, see logic diagrams.
Inputs
CLKEN1B CLKEN2B CLK
SEL
1B
2B
H
X
X
H
X
X
X
H
X
L
X
X
L
X
↑
H
L
X
L
X
↑
H
H
X
X
L
↑
L
X
L
X
L
↑
L
X
H
B-to-A storage (OEA = L)
Output A
A₀ ^*1
A₀ ^*1
L
H
L
H
H : High level
L : Low level
X : Immaterial
Z : High impedance
↑ : Low to high transition
Notes: 1. Output level before the indicated steady state input conditions were established.
2. Two CLK edges are needed to propagate data.
Rev.3.00, Oct.02.2003, page 2 of 12