HD74AC374 Datasheet, PDF (2/10 Pages) Hitachi Semiconductor – Octal D-Type Flip-Flops with 3-State Output

HD74AC374/HD74ACT374
Pin Arrangement
OE 1
O0 2
D0 3
D1 4
O1 5
O2 6
D2 7
D3 8
O3 9
Gnd 10
Logic Symbol
(Top view)
20 VCC
19 O7
18 D7
17 D6
16 O6
15 O5
14 D5
13 D4
12 O4
11 CP
D0 D1 D2 D3 D4 D5 D6 D7
CP
OE
O0 O1 O2 O3 O4 O5 O6 O7
Pin Names
D₀ – D₇
CP
OE
O₀ – O₇
Data Inputs
Clock Pulse Input
3-State Output Enable Input
3-State Outputs
Functional Description
The HD74AC374/HD74ACT374 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-state
true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will
store the state of their individual D inputs that meet the setup and hold time requirements on the Low-to-High Clock
(CP) transition. With the Output Enable (OE) Low, the contents of the eight flip-flops are available at the outputs.
When the OE is High, the outputs go to the high impedance state. Operation of the OE input does not affect the state of
the flip-flops.
Rev.2.00, Jul.16.2004, page 2 of 9