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M3062GF8NFP Datasheet, PDF (191/241 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER | |||
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Rev.1.1
CPU Rewrite Mode (Flash Memory Version)
Mitsubishi microcomputers
M3062GF8NFP/GP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Program in ROM
Start
Single-chip mode, memory expansion
mode, or boot mode
Set processor mode register (Note 1)
Transfer CPU rewrite mode control
program to internal RAM
Jump to transferred control program in RAM
(Subsequent operations are executed by control
program in this RAM)
*1
Program in RAM
*1
(Boot mode only)
Set user ROM area select bit to â1â
Set CPU rewrite mode select bit to â1â (by
writing â0â and then â1â in succession)(Note 2)
Using software command execute erase,
program, or other operation
(Set lock bit disable bit as required)
Execute read array command or reset flash
memory by setting flash memory reset bit (by
writing â1â and then â0â in succession) (Note 3)
Write â0â to CPU rewrite mode select bit
(Boot mode only)
Write â0â to user ROM area select bit (Note 4)
End
Note 1: During CPU rewrite mode, set the BCLK as shown below using the main clock divide ratio select bit (bit 6
at address 000616 and bits 6 and 7 at address 000716):
6.25 MHz or less when wait bit (bit 7 at address 000516) = â0â (without internal access wait state)
10.0 MHz or less when wait bit (bit 7 at address 000516) = â1â (with internal access wait state)
Note 2: For CPU rewrite mode select bit to be set to â1â, the user needs to write a â0â and then a â1â to it in
succession. When it is not this procedure, it is not enacted in â1â. This is necessary to ensure that no
interrupt or DMA transfer will be executed during the interval. Write to this bit only when executing out of
an area other than the internal flash memory. Also only when NMI pin is âHâ level.
Note 3: Before exiting the CPU rewrite mode after completing erase or program operation, always be sure to
execute a read array command or reset the flash memory.
Note 4: â1â can be set. However, when this bit is â1â, user ROM area is accessed.
Figure 1.29.2. CPU rewrite mode set/reset flowchart
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