M16C6S Datasheet, PDF (161/196 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

M16C/6S Group
Flash Memory Version
1. Memory Map
The ROM in the flash memory version is separated between a user ROM area and a boot ROM area.
Figure 1.20.1 shows the block diagram of flash memory.
The user ROM area is divided into several blocks, so that memory can be erased one block at a time. The
user ROM area can be rewritten in all of CPU rewrite, standard serial input/output, and parallel input/output
modes.
The boot ROM area is located at addresses that overlap the user ROM area, and can only be rewritten in
parallel input/output mode.
0E800016
Block 4 : 32K bytes
0EFFFF16
0F000016
Block 3 : 32K bytes
0F7FFF16
0F800016
Block 2 : 16K bytes
0FBFFF16
0FC00016
0FDFFF16
0FE00016
0FFFFF16
Block 1 : 8K bytes
Block 0 : 8K bytes
User ROM area
0FF00016
0FFFFF16
4K bytes
Boot ROM area (Reserved)
Note 1: To specify a block, use an even address in that block.
Note 2: Blocks 0 and 1 can be rewritten if FMR02 of FMR0 register is set to "1" (only in case of CPU rewriting mode.)
Figure 1.20.1. Flash Memory Block Diagram
Rev.4.00 Aug 05, 2005 page 161 of 190
REJ03B0014-0400