RAJ240045 Datasheet, PDF (16/67 Pages) Renesas Technology Corp – Integrated Li-ION Battery Managemer for 2-4 Series Cell

（2）During communication at same potential (CSI mode) (master mode (fMCK/4), SCKp…internal clock output)
(TA = -20 to +85 °C，4.0 V≦VCC≦25 V, VREG2 = 3.3 V, GND0 = GND1 = 0 V)
Item
Symbol
Condition
MIN. TYP. MAX. Unit
SCKp cycle time
tKCY1
125 ^{Note 1} -
-
ns
SCKp high-/low-level
tKH1,
width
tKL1
tKCY1/2-18
-
-
ns
Sip setup time
tSIK1
(to SCKp↑) ^{Note 2}
44
-
-
ns
Sip hold time
tKSI1
(to SCKp↑) ^{Note 2}
Delay time from SCKp↓ to tKSO1
Sop output ^{Note 3}
C = 30 pF ^{Note 4}
19
-
-
ns
-
-
25
ns
Notes 1. The value must also be 4/fCLK or more.
2. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to
SCKp↓” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
3. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from
SCKp↑” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.
4 C is the load capacitance of the SCKp and SOp output lines.
Caution. Select the normal input buffer for the SIp pin and the normal output mode for the SOp pin and
SCKp pin by using port input mode register g (PIMg) and port output mode register g
(POMg).
Remarks 1. p:CSI number (p=11),m:Unit number (m=0),n:Channel number (n=3)
g:PIM,POM number(g=1)
2. fMCK : Serial array unit operation clock frequency
(Operation clock to be set by the CKSmn bit of serial mode register (SMRmn). m:Unit number
n:Channel number(mn= 03))
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