R8C2H Datasheet, PDF (150/367 Pages) Renesas Technology Corp – MCU

R8C/2H Group, R8C/2J Group
13. Interrupts
13.1.6.10 Interrupt Priority Judgement Circuit
The interrupt priority judgement circuit selects the highest priority interrupt, as shown in Figure 13.10.
Priority level of interrupt
Compare 0
Timer RB
Timer RA
Comparator 2⁽¹⁾
Capture
Level 0 (default value) ^Highest
INT0
Timer RF
INT1
UART0 receive
Compare 1
UART2 receive⁽³⁾
Timer RE⁽³⁾
Priority of peripheral function interrupts
(if priority levels are same)
UART0 transmit
Key input
UART2 transmit⁽³⁾
Comparator 1⁽¹⁾
IPL
I flag
Address match
Watchdog timer
Voltage monitor 1
Voltage monitor 2
Comparator 1⁽²⁾
Comparator 2⁽²⁾
Lowest
Interrupt request level
judgment output signal
Interrupt request
acknowledged
NOTES:
1. When maskable interrupts is selected.
2. When non-maskable interrupts is selected.
3. Applicable to the R8C/2H Group only.
Figure 13.10 Interrupt Priority Level Judgement Circuit
Rev.1.00 Mar 28, 2008 Page 130 of 341
REJ09B0388-0100