HM62A16100I Datasheet, PDF (15/17 Pages) Renesas Technology Corp – Wide Temperature Range Version 16 M SRAM (1-Mword × 16-bit)

HM62A16100I Series
Low V_CC Data Retention Timing Waveform (1) (CS1 Controlled)
V_CC
1.65 V
t _CDR
Data retention mode
0.75 × V _CC
V_DR
+5
0V
CS1 ≥ V_CC – 0.2 V
Low V_CC Data Retention Timing Waveform (2) (CS2 Controlled)
V_CC
1.65 V
CS2
V_DR
0.25 × V_CC
0V
t_CDR
Data retention mode
0 V < CS2 < 0.2 V
Low V_CC Data Retention Timing Waveform (3) (LB, UB Controlled)
V_CC
1.65 V
t _CDR
Data retention mode
0.75 × V_CC
V_DR
LB, UB
0V
LB, UB ≥ V_CC – 0.2 V
t_R
t_R
t_R
Rev.0.01, Jun.02.2003, page 15 of 17