H83029 Datasheet, PDF (15/1010 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

2.9 Basic Operational Timing ................................................................................................. 55
2.9.1 Overview.............................................................................................................. 55
2.9.2 On-Chip Memory Access Timing........................................................................ 55
2.9.3 On-Chip Supporting Module Access Timing ...................................................... 56
2.9.4 Access to External Address Space ....................................................................... 57
Section 3 MCU Operating Modes .....................................................................59
3.1 Overview........................................................................................................................... 59
3.1.1 Operating Mode Selection ................................................................................... 59
3.1.2 Register Configuration......................................................................................... 60
3.2 Mode Control Register (MDCR) ...................................................................................... 61
3.3 System Control Register (SYSCR) ................................................................................... 62
3.4 Operating Mode Descriptions ........................................................................................... 64
3.4.1 Mode 1 ................................................................................................................. 64
3.4.2 Mode 2 ................................................................................................................. 64
3.4.3 Mode 3 ................................................................................................................. 64
3.4.4 Mode 4 ................................................................................................................. 65
3.4.5 Mode 5 ................................................................................................................. 65
3.4.6 Mode 7 ................................................................................................................. 65
3.5 Pin Functions in Each Operating Mode ............................................................................ 66
3.6 Memory Map in Each Operating Mode ............................................................................ 67
3.6.1 Note on Reserved Areas....................................................................................... 67
Section 4 Exception Handling ...........................................................................73
4.1 Overview........................................................................................................................... 73
4.1.1 Exception Handling Types and Priority............................................................... 73
4.1.2 Exception Handling Operation ............................................................................ 73
4.1.3 Exception Vector Table ....................................................................................... 74
4.2 Reset.................................................................................................................................. 76
4.2.1 Overview.............................................................................................................. 76
4.2.2 Reset Sequence .................................................................................................... 76
4.2.3 Interrupts after Reset............................................................................................ 78
4.3 Interrupts........................................................................................................................... 79
4.4 Trap Instruction................................................................................................................. 80
4.5 Stack Status after Exception Handling.............................................................................. 81
4.6 Notes on Stack Usage ....................................................................................................... 82
Section 5 Interrupt Controller............................................................................85
5.1 Overview........................................................................................................................... 85
5.1.1 Features................................................................................................................ 85
5.1.2 Block Diagram ..................................................................................................... 86
5.1.3 Pin Configuration................................................................................................. 87
5.1.4 Register Configuration......................................................................................... 87
Rev. 2.0, 06/04, page xii of xxiv