PD78F0066_15 Datasheet, PDF (13/30 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCONTROLLER

µPD78F0066
2.1 Port Pins (2/2)
Pin Name
P90
P91
P92
I/O
Function
I/O Port 9
3-bit input/output port.
Input/output can be specified bit-wise.
When used as an input port, an internal pull-up resistor can be connected by
software.
After
Reset
Alternate
Function
Input SCK31
SO31
SI31
2.2 Non-Port Pins (1/2)
Pin Name I/O
Function
After
Reset
Alternate
Function
INTP0 to
INTP3
Input External interrupt request input by which the effective edge (rising edge, falling Input P00 to P03
edge, or both rising edge and falling edge) can be specified.
TI00
Input External count clock input to 16-bit timer (TM0).
Capture trigger signal input to capture register (CR01) of TM0.
Input P20/TO0
TI01
Capture trigger signal input to capture register (CR00) of TM0.
P21
TI50
External count clock input to 8-bit timer (TM50).
P22/TO50
TI51
External count clock input to 8-bit timer (TM51).
P23/TO51
TO0
Output 16-bit timer output.
Input P20/TI00
TO50
8-bit timer output (shared with 8-bit PWM output).
P22/TI50
TO51
P23/TI51
SI1
Input Serial interface serial data input.
Input P84
SI31
Input
P92
SO1
Output Serial interface serial data output.
Input P83
SO31
Output
P91
SDIO30
I/O Serial interface serial data input/output.
Input P75
SCK1
I/O Serial interface serial clock input/output.
Input P82
SCK30
Input P74
SCK31
Input P90
BUSY
Input Busy input for serial interface automatic transmission/reception.
Input P81
STB
Output Strobe output for serial interface automatic transmission/reception.
Input P80
RxD0
Input Serial data input for asynchronous serial interface.
Input P73
TxD0
Output Serial data output for asynchronous serial interface.
Input P72
ASCK0
Input Serial clock input for asynchronous serial interface.
Input P71
PCL
Output Clock output (for trimming of main system clock and subsystem clock).
Input P70
AD0 to AD7 I/O Lower address/data bus for extending memory externally.
Input P40 to P47
A8 to A15 Output Higher address bus for extending memory externally.
Input P50 to P57
RD
Output Strobe signal output for read operation of external memory.
Input P64
WR
Output Strobe signal output for write operation of external memory.
Input P65
WAIT
Input Inserting wait for accessing external memory.
Input P66
ASTB
Output Strobe output which externally latches address information output to port 4
and port 5 to access external memory.
Input P67
ANI0 to ANI7 Input A/D converter analog input.
Input
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Preliminary Product Information
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