7470_M Datasheet, PDF (128/361 Pages) Renesas Technology Corp – 8-BIT SINGLE-CHIP MICROCOMPUTER 740 FAMILY / 7470 SERIES

HARDWARE
1.13 Serial I/O
Synchronous clock,
BRG output divided by 16, or
external clock divided by 16
TXD pin
ST D0 D1 D2
Write signal to
Transmit buffer register
Serial I/O not used
D6 D7 SP
Transmit buffer empty flag
Transmit shift completion flag
Transmit interrupt enable bit
Transmit interrupt request bit
B1
A1
B2
A2
A1 A2 : • Clearing by writing “0” to the transmit interrupt request bit.
• Clearing by accepting the transmit interrupt.
B1 : When interrupt request generation is selected, when the Transmit buffer register
becomes empty by clearing the transmit interrupt source selection bit to “0”.
B2 : When interrupt request generation is selected, when the shift operation of the
Transmit shift register is completed by setting the transmit interrupt source selection bit to “1”.
Fig. 1.13B.10 Transmit timing chart of UART
7470/7471/7477/7478 GROUP USER’S MANUAL
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