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H838024_10 Datasheet, PDF (126/684 Pages) Renesas Technology Corp – Renesas 8-Bit Single-Chip Microcomputer H8 Family/H8/300L Super Low Power Series | |||
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Section 4 Clock Pulse Generators
IRQAEC
OSC1
OSC2
X1
X2
Internal reset signal (other than watchdog timer or low-voltage detect
circuit reset)
C
D
Q
Latch
System
clock
oscillator
ÏOSC
(fOSC)
System
clock
divider
(1/2)
On-chip ROSC
oscillator
ÏOSC/2
System
clock
divider
ÏOSC/16
ÏOSC/32
ÏOSC/64
ÏOSC/128
System clock pulse generator
Subclock
ÏW
oscillator
(fW)
Subclock
divider
(1/2, 1/4, 1/8)
ÏW/2
ÏW/4
ÏW/8
Subclock pulse generator
Ï
Prescaler S
(13 bits)
Ï/2
to
Ï/8192
ÏW
ÏSUB
Prescaler W
(5 bits)
ÏW/2
ÏW/4
ÏW/8
to
ÏW/128
Figure 4.2 Block Diagram of Clock Pulse Generators (H8/38124 Group)
4.1.2 System Clock and Subclock
The basic clock signals that drive the CPU and on-chip peripheral modules are Ï and ÏSUB. Four
of the clock signals have names: Ï is the system clock, ÏSUB is the subclock, ÏOSC is the oscillator
clock, and ÏW is the watch clock.
The clock signals available for use by peripheral modules are Ï/2, Ï/4, Ï/8, Ï/16, Ï/32, Ï/64,
Ï/128, Ï/256, Ï/512, Ï/1024, Ï/2048, Ï/4096, Ï/8192, ÏW, ÏW/2, ÏW/4, ÏW/8, ÏW/16, ÏW/32, ÏW/64,
and ÏW/128. The clock requirements differ from one module to another.
Rev. 8.00 Mar. 09, 2010 Page 104 of 658
REJ09B0042-0800
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