M30302MAP Datasheet, PDF (12/36 Pages) Renesas Technology Corp – SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under development ^{Preliminary specification}
Specifications in this manual are tentative and subject to change.
M16C/30P Group
3. Memory
3. Memory
Figure 3.1 is a Memory Map of the M16C/30P group. The address space extends the 1M bytes from address 00000h to
FFFFFh.
The internal ROM is allocated in a lower address direction beginning with address FFFFFh. For example, a 64-Kbyte
internal ROM is allocated to the addresses from F0000h to FFFFFh.
The fixed interrupt vector table is allocated to the addresses from FFFDCh to FFFFFh. Therefore, store the start
address of each interrupt routine here.
The internal RAM is allocated in an upper address direction beginning with address 00400h. For example, a 10-Kbyte
internal RAM is allocated to the addresses from 00400h to 02BFFh. In addition to storing data, the internal RAM also
stores the stack used when calling subroutines and when interrupts are generated. The SFR is allocated to the addresses
from 00000h to 003FFh. Peripheral function control registers are located here. Of the SFR, any area which has no
functions allocated is reserved for future use and cannot be used by users.
The special page vector table is allocated to the addresses from FFE00h to FFFDBh. This vector is used by the JMPS
or JSRS instruction. For details, refer to the M16C/60 and M16C/20 Series Software Manual.
00000h
00400h
XXXXXh
SFR
Internal RAM
Reserved area
Internal RAM
Internal ROM
Size Address XXXXXh Size Address YYYYYh
5 kbytes
017FFh 96 kbytes E8000h
6 kbytes 01BFFh 128 kbytes E0000h
192 kbytes D0000h
YYYYYh
FFFFFh
Internal ROM
FFE00h
Special page
vector table
FFFDCh
FFFFFh
Undefined instruction
Overflow
BRK instruction
Address match
Single step
Watchdog timer
DBC
NMI
Reset
Figure 3.1 Memory Map
Rev.0.80 Mar 18, 2005 Page 12 of 34
REJ03B0088-0080