HA16163T Datasheet, PDF (12/30 Pages) Renesas Technology Corp – Synchronous Phase Shift Full-Bridge Control IC

HA16163T
The remote on and off threshold voltages are provided with hysteresis of 84 mV (typ). Remote control can be
performed by means of analog input as shown in the diagram below as well as by means of logic control. The
following diagram shows an example in which the power supply set input voltage is sensed by means of the REMOTE
pin, and the power supply set start-up voltage is set to 34 V, and the shutdown voltage to 32 V.
VIN
5V(VREF)
VIN(on) = VON(remote) × (R1+R2)/R2
R1
= 1.417V × 24
= 34.008V
VIN(off) = VOFF(remote) × (R1+R2)/R2
= 1.333V × 24
= 31.992V
R2
220k
10k
HA16163
REMOTE
Full-bridge
control
10k
100p
GND
Remote control circuit VIN sense circuit
(logic input)
(analog input)
Figure 3
Power Stage
Start-up Counter
When the VREFGOOD signal (internal signal) goes to the logic low level, the HA16163 starts operating as a controller.
The VREFGOOD signal is created from the REMOTE comparator and VREFGOOD circuit output via a 32-clock start-
up counter.
VCC
REMOTE
H
L
+
ON: 1.417V
OFF: 1.333V
−
UVL
UVLO
From Oscillator
5V
Generator
VREF ^H
GOODL
Start-up
counter
32 clock
VREFGOOD
VREF
Circuit Bias
Figure 4
Therefore, the start of IC operation is a 32-count later than UVLO release or the remote on trigger. When the oscillator
frequency is set to 1 MHz, this represents a delay of 32 µs. This delay enables operation to be halted until VREF (5 V)
stabilizes when UVLO is released. Note that the start-up counter operates when VREF rises or when a remote on
operation is performed, but does not operate when VREF falls or when a remote off operation is performed (there is no
logic delay due to the start-up counter).
VCC
9.8V
VREF
RES
(Internal signal)
VREFGOOD
(Internal signal)
4.6V
Rev.5.0, Mar.15.2004, page 12 of 29
7.9V
32 counts
4.4V
Figure 5
Start of Operation
operation halted