R8C10 Datasheet, PDF (119/199 Pages) Renesas Technology Corp – RENESAS 16-BIT SINGLE-CHIP MICROCOMPUTER

R8C/10 Group
14.2 Repeat Mode
14.2 Repeat Mode
In repeat mode, the input voltage on one selected pin is A/D converted repeatedly. Table 14.3 lists the
specifications of repeat mode. Figure 14.5 shows the ADCON0 and ADCON1 registers in repeat
mode.
Table 14.3 Repeat Mode Specifications
Item
Specification
Function
Input voltage on one pin selected by CH2 to CH0 bits is A/D converted repeatedly
Start condition
Set ADST bit to “1”
Stop condition
Set ADST bit to “0”
Interrupt request generation timing None generated
Input pin
One of AN0 to AN7, as selected
Reading of result of A/D converter Read AD register
AD control register 0⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
0 01
Symbol
ADCON0
Address After reset
00D616 00000XXX2
Bit symbol
Bit name
Function
RW
b2 b1 b0
CH0
Analog input pin select
0 0 0 : AN0 is selected
RW
bit⁽²⁾
0 0 1 : AN1 is selected
0 1 0 : AN2 is selected
CH1
0 1 1 : AN3 is selected
RW
1 0 0 : AN4 is selected
1 0 1 : AN5 is selected
CH2
1 1 0 : AN6 is selected
RW
1 1 1 : AN7 is selected
MD
AD operation mode select ^{1 : Repeat mode}
bit⁽²⁾
RW
Reserved bit
(b4)
Must set to “0”
RW
Reserved bit
(b5)
Must set to “0”
RW
ADST
A/D conversion start flag 0 : A/D conversion disabled
1 : A/D conversion started
RW
CKS0
Frequency select bit 0⁽³⁾ 0 : fAD/4 is selected
1 : fAD/2 is selected
RW
NOTES:
1. If the ADCON0 register is rewritten during A/D conversion, the conversion result is indeterminate.
2. When changing A/D operation mode, set analog input pin again.
3. This bit is valid when the CKS1 bit in the ADCON1 register is set to “0”.
AD control register 1⁽¹⁾
b7 b6 b5 b4 b3 b2 b1 b0
001 0000
Symbol
ADCON1
Address
00D716
After reset
0016
Bit symbol
Bit name
Function
RW
Reserved bit
(b2-b0)
Must set to “0”
RW
BITS
8/10-bit mode select
bit⁽²⁾
0 : 8-bit mode
RW
CKS1 ^{Frequency select}
0 : CKS0 bit in ADCON0 register is valid
RW
bit 1⁽³⁾
1 : fAD is selected
VCUT ^{Vref connect bit(4)}
1 : Vref connected
RW
Reserved bit
(b6-b7)
Must set to “0”
RW
NOTES:
1. If the ADCON1 register is rewritten during A/D conversion, the conversion result is indeterminate.
2. In repeat mode, the BITS bit must be set to “0” (8-bit mode).
3. The φAD frequency must be 10 MHz or less.
4. If the VCUT bit is reset from “0” (Vref unconnected) to “1” (Vref connected), wait for 1 µs or more before starting A/D
conversion.
Figure 14.5 ADCON0 Register and ADCON1 Register in Repeat Mode
Rev.1.20 Jan 27, 2006 page 109 of 180
REJ09B0019-0120