M37161M8_15 Datasheet, PDF (118/131 Pages) Renesas Technology Corp – SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER

M37161M8/MA/MF-XXXSP/FP,M37161EFSP/FP
Address 00F516
Timer Mode Register 2
b7 b6 b5 b4 b3 b2 b1 b0
Timer mode register 2 (TM2) [Address 00F516]
B
Name
0 Timer 3 count source
selection bit (TM20)
Functions
After reset R W
(b6 at address 00C7 16)
0 RW
b0
0 0 : f(XIN)/16 or f(XCIN)/16 (See note)
1 0 : f(XCIN)
0 1:
1 1 : ^{External clock from TIM3 pin}
1, 4 Timer 4 count source b4 b1
selection bits
0 0 : Timer 3 overflow signal
0 RW
(TM21, TM24)
0 1 : f(XIN)/16 or f(XCIN)/16 (See note)
1 0 : f(XIN)/2 or f(XCIN)/2 (See note)
1 1 : f(XCIN)
2 Timer 3 count
stop bit (TM22)
3 ^{Timer 4 count stop bit}
(TM23)
0: Count start
1: Count stop
0: Count start
1: Count stop
0 RW
0 RW
5 ^{Timer 5 count stop bit}
(TM25)
6 ^{Timer 6 count stop bit}
(TM26)
0: Count start
1: Count stop
0: Count start
1: Count stop
0 RW
0 RW
7 ^{Timer 5 count source} 0: f(XIN)/16 or f(XCIN)/16 (See note)
0
selection bit 1
1: Count source selected by bit 6
(TM27)
of TM1
Note: Either f(XIN) or f(XCIN) is selected by bit 7 of the CPU mode register.
RW
Address 00F616
I²C Data Shift Register
b7 b6 b5 b4 b3 b2 b1 b0
I2C data shift register 1(S0) [Address 00F616]
B Name
Functions
0 D0 to D7 This is an 8-bit shift register to store
to
receive data and write transmit data.
7
After reset R W
Indeterminate R W
Note : To write data into the I2C data shift register after setting the MST bit to
“0” (slave mode), keep an interval of 8 machine cycles or more.
Rev.1.00 2003.11.25 page 116 of 128