RAJ240080 Datasheet, PDF (11/73 Pages) Renesas Technology Corp – Integrated Li-ION Battery Management IC for 2-5 Series Cell

3. ELECTRICAL SPECIFICATIONS
Caution This product has an on-chip debug function, which is provided for development and evaluation. Do not
use the on-chip debug function in products designated for mass production because the guaranteed
number of rewritable times of the flash memory may be exceeded when this function is used, and product
reliability therefore cannot be guaranteed. Renesas Electronics is not liable for problems occurring when
the on-chip debug function is used.
3.1 Absolute Maximum Ratings
Absolute Maximum Ratings (TA = 25 °C)
Parameter Symbols
Condition
Ratings
Unit
Supply voltage
VCC
GND0, GND1
-0.5 to 35
V
-0.5 to 0.3
V
CREG1 input
voltage
VREG1
CREG1
-0.3 to 2.0 ^{Note 2}
V
CREG2 input
voltage
VREG2
CREG2
-0.3 to 5.5 ^{Note 3}
V
REGC pin
input voltage
Input voltage
VIREGC
VI1
Output voltage
VI2
Vin-H
Vin-B
VO1
VO-DH
VO-CH
VO-FH
Analog input voltage _VAI
VIS
High-level
IOH
output current
Low-level
Output current
IOH-FH
IOL
Power consumption Pd
Operating ambient Topr
Temperature
Storage
Tstg
temperature
REGC
-0.3 to 2.8
V
P00, P02, P03, P10 to P14, P16, P17, P43,
And -0.3 to VREG2 +
0.3 ^{Note 1}
V
-0.3 to VREG2 + 0.3
P50 to P54, P120, P122, P137, TOOL0(P40), RESET(MCU)
SDA(P61), SCL(P60) (N-ch open drain)
-0.3 to 5.5
V
VIN5, VIN4, VIN3, VIN2, VIN1, VIN12,SYSIN
-0.5 to 35
V
VIN5-VIN4, VIN4-VIN3, VIN3-VIN2, VIN2-VIN1, VIN1-GND0
-0.5 to 7
V
P00, P02, P03, P10 to P14, P16, P17, P43, P50 to P54,
P120, TOOL0(P40), SDA(P61), SCL(P60)
-0.3 to VREG2 + 0.3 V
DFOUT
-0.5 to 35
V
CFOUT
-0.5 to 35
V
FUSEOUT
-0.3 to VCC + 0.3
V
And -0.5 to 35
AN0, AN1, AN2
-0.3 to 2.0
V
ISENS0, ISENS1
P02, P03, P10 to P17,
P43, P50 to P54, P120
FUSEOUT
Per pin
Total of all pins
-0.3 to 2.0
V
-40
mA
-100
mA
-10
mA
P02, P03, P10 to P17,
P43, P50 to P54, P120
Per pin
Total of all pins
40
mA
100
mA
Topr=25°C
300
mW
-20 to 85
°C
-65 to 150
°C
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