R1EX24256ASAS0I_10 Datasheet, PDF (10/26 Pages) Renesas Technology Corp – Two-wire serial interface 256k EEPROM (32-kword × 8-bit)

R1EX24256AxxS0I
Device Address (A0, A1, A2)
Eight devices can be wired for one common data bus line as maximum. Device address pins are used to
distinguish each device and device address pins should be connected to V_CC or V_SS. When device address
code provided from SDA pin matches corresponding hard-wired device address pins A0 to A2, that one
device can be activated.
These pins are internally pulled-down to V_SS. The device reads these pins as Low if unconnected.
Pin Connections for A0 to A2
Pin connection
Max connect
Memory size number
A2
A1
A0
256k bit
8
V_CC/V_SS
V_CC/V_SS
V_CC/V_SS
Note: 1. During floating, "V_CC/V_SS" are fixed to V_SS.
Note
Write Protect (WP)
When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in
the following table.
Also, acknowledgment "0" is outputted after inputting device address and memory address. After
inputting write data, acknowledgment "1""(NO ACK) is outputted.
When the WP is low, write operation for all memory arrays are allowed. The read operation is always
activated irrespective of the WP pin status.
The WP pin is internally pulled-down to V_SS. Write operations for all memory array are allowed if
unconnected.
Write Protect Area
WP pin status
V_IH
V_IL
Write protect area
256k bit
Full (256k bit)
Normal read/write operation
REJ03C0327-0100 Rev.1.00 Oct. 26, 2009
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