TNA090AE Datasheet, PDF (1/2 Pages) Renesas Technology Corp – MPU & MCU

RENESAS TECHNICAL UPDATE TN-RX*-A000A/E
Date: Feb. 25, 2014
RENESAS TECHNICAL UPDATE
1753, Shimonumabe, Nakahara-ku, Kawasaki-shi, Kanagawa 211-8668 Japan
Renesas Electronics Corporation
Product
Category
MPU & MCU
Document
No.
TN-RX*-A090A/E
Rev. 1.00
Title Restriction on AVCC0 in the RX111 Group
Information
Category
Technical Notification
Applicable
Product
RX111 Group
Lot No.
All
Reference
Document
RX111 Group User's Manual:
Hardware Rev.1.00
(R01UH0365EJ0100)
This document describes a restriction on the operating conditions for AVCC0 in RX111 Group User's Manual: Hardware.
1. Restriction
Set the voltage for the AVCC0 pin to the same voltage as the VCC pin.
2. Corrections to the Manual
Since the above restriction is added, descriptions in the manual are corrected as follows.
•Page 1077 of 1209
Descriptions in 30.7.10 are corrected as follows:
Before correction
•Relationship between power supply pin pairs (AVCC0–AVSS0, VREFH0–VREFL0, VCC–VSS)
Relationship between AVSS0 and VSS: AVSS0 = VSS. A 0.1-μF capacitor should be connected between each pair of
power supply pins to create a closed loop with the shortest rout possible as shown in Figure 30.16, and connection
should be made so that the following conditions are satisfied at the supply side.
VREFL0 = AVSS0 = VSS
When the A/D converter is not used, the following conditions should be satisfied.
VREFH0 = AVCC0 = VCC and VREFL0 = AVSS0 = VSS
After correction
•Relationship between power supply pin pairs (AVCC0–AVSS0, VREFH0–VREFL0, VCC–VSS)
The following conditions should be satisfied: AVCC0 = VCC, and AVSS0 = VSS. A 0.1-μF capacitor should be
connected between each pair of power supply pins to create a closed loop with the shortest route possible as shown in
Figure 30.16, and connection should be made so that the following conditions are satisfied at the supply side.
VREFL0 = AVSS0 = VSS
When the A/D converter is not used, the following conditions should be satisfied.
VREFH0 = AVCC0 = VCC and VREFL0 = AVSS0 = VSS
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