RNA52A10MM_08 Datasheet, PDF (1/12 Pages) Renesas Technology Corp – Dual CMOS system.RESET IC

RNA52A10MM
Dual CMOS system–RESET IC
REJ03D0858-0500
Rev.5.00
Oct 06, 2008
Description
The RNA52A10MM incorporates two reset circuits, one with and one without a delay function, allowing the generation
of separate reset signals for a microprocessor and associated system circuits. The detection voltage of each reset circuit is
determined by the value of an external resistor, and the internal reference voltage is 1.0 V. The CMOS process for the
RNA52A10MM means that the device draws only 1.1 µA (typ.). The reset cancellation delay time is set with a high
degree of accuracy by the values of a capacitor and resistor connected with the CD pin. The MR (manual reset) input pin
is provided for the reset circuit with the delay function, and the reset signal is output in response to a high level on the MR
input pin. The MR pin is pulled down by a 2-MΩ internal resistor. Output pins Vo1 and Vo2 are open drain.
Features
• Two CMOS reset circuits, one with and one without the delay function
• Reference voltage: 1.0 V
• Reference voltage accuracy: ± 50 mV
• Reference voltage hysteresis: 6% (typ.)
• Low current consumption: 1.1 µA (typ.)
• Delay time set by an external CR circuit
• Manual reset input
• Open-drain output
• MMPAK-8 (8-pin) package
• Operating temperature range: – 40 to 85°C
• Ordering Information
Part Name
RNA52A10MMEL
Package Type
MMPAK-8 pin
Package Code
PLSP0008JC-A
Package
Abbreviation
MM
Taping Abbreviation
(Quantity)
EL (3,000 pcs / Reel)
Application
• Power-supply monitoring and resetting for microprocessors
• Power supply sequence control for microprocessors
• Desktop and laptop PCs
• PC peripheral devices such as printers
• Digital still cameras, digital video cameras, and PDAs
• Battery-driven products
• Wireless communications systems
REJ03D0858-0500 Rev.5.00 Oct 06, 2008
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