RJK03P0DPA Datasheet, PDF (1/11 Pages) Renesas Technology Corp – Built in SBD Dual N-channel Power MOS FET High Speed Power Switching

Preliminary Datasheet
RJK03P0DPA
MOS1 30 V, 20 A, 7.0 mΩ max.
MOS2 30 V, 25 A, 7.2 mΩ max.
Built in SBD Dual N-channel Power MOS FET
High Speed Power Switching
R07DS0904EJ0120
Rev.1.20
Nov 01, 2012
Features
 Low on-resistance
 Capable of 4.5 V gate drive
 High density mounting
 Pb-free
 Halogen-free
Outline
RENESAS Package code: PWSN0008DD-B
(Package name: WPAK-D(3))
234
D1 D1 D1
5 ⁶⁷⁸
1
8
G1
G2
4 32 1
MOS1
9
S1/D2
5678
9
S2 S2 S2
56 7
4321
(Bottom View)
MOS2 and
Schottky Barrier Diode
1, 8
Gate
2, 3, 4, 9 Drain
5, 6, 7, 9 Source
Absolute Maximum Ratings
Item
Symbol
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
V_DSS
V_GSS
I_D
I_{D(pulse)Note1}
I_DR
I_AP ^{Note 2}
E_AR ^{Note 2}
Pch ^Note3
Channel temperature
Tch
Storage temperature
Tstg
Notes: 1. PW  10 s, duty cycle  1%
2. Value at Tch = 25C, Rg  50 
3. Tc=25C
MOS1
30
±20
20
80
20
12
14.4
15
150
–55 to +150
Ratings
MOS2
30
±20
25
100
25
9.5
9.0
20
150
–55 to +150
(Ta = 25°C)
Unit
V
V
A
A
A
A
mJ
W
°C
°C
R07DS0904EJ0120 Rev.1.20
Nov 01, 2012
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