RAJ240090 Datasheet, PDF (1/69 Pages) Renesas Technology Corp – Ultra-low power consumption technology

preliminary version
This specification is a provisional specification may be changed in the future.
RAJ240090/RAJ240100
RENESAS BATTERY MANAGEMENT IC
R01DS0301EJ0001
Rev.0.01
Sep 29, 2016
OUTLINE
1.1 Features
- Ultra-low power consumption technology
 HALT mode
 STOP mode
 SNOOZE mode
- Supply current
 Power down mode : 1uA [TYP]
 Sleep mode 1 (MCU stop, CFOUT off, DFOUT off) : 25uA [TYP]
 Sleep mode 2 (MCU stop, CFOUT on, DFOUT on) : 50uA [TYP]
 Normal mode (MCU 8MHz, CFET on, DFET on) : 2mA [TYP]
- RL78 CPU core
 CISC architecture with 3-stage pipeline
 Minimum instruction execution time :Can be changed from high speed (0.03125us : @32MHz
operation with high-speed on-chip oscillator) to ultra-low speed (30.5us : @32.768kHz operation with
subsystem clock)
 Multiply/divide/multiply & accumulate instructions are supported.
 Address space : 1MB
 General-purpose registers : (8-bit register x 8) x 4 banks
 On-chip RAM : 7kB
- Code flash memory
 Code flash memory : 128 KB
 Block size : 1KB
 Prohibition of block erase and rewriting (security function)
 On-chip debug function
 Self-programming (with boot swap function/flash shield window function)
- Data flash memory
 Data flash memory : 4 KB
 Back ground operation (BGO): Instructions can be executed from the program memory while rewriting
the data flash memory.
 Number of rewrites : 1,000,000 times (TYP.)
- High-speed on-chip oscillator
 Select from 32 MHz, 24MHz, 16MHz, 12MHz, 8MHz, 6MHz, 4MHz, 3MHz, 2MHz and 1MHz)
 High accuracy : +/- 1.0% (TA = -20 to +85C)
R01DS0301EJ0001 Rev.0.01
Sep 29, 2016
Page 1 of 69