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R5F562TAADFH Datasheet, PDF (1/94 Pages) Renesas Technology Corp – 100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC | |||
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Datasheet
RX62T Group
Renesas MCUs
R01DS0096EJ0100
100-MHz 32-bit RX MCUs, FPU, 165 DMIPS, 12-bit ADC (3 S/H circuits, double data
register, amplifier, comparator): two units, 10-bit ADC one unit, the three ADC units are
Rev.1.00
Apr 20, 2011
capable of simultaneous 7-ch. sampling, 100-MHz PWM (two three-phase complementary
channels and four single-phase complementary channels or three three-phase
complementary channels and one single-phase complementary channel)
Features
â 32-bit RX CPU core
ï· Max. operating frequency: 100 MHz
Capable of 165 DMIPS in operation at 100 MHz
ï· Single precision 32-bit IEEE-754 floating point
ï· Accumulator handles 64-bit results (for a single
instruction) from 32- Ã 32-bit operations
ï· Multiplication and division unit handles 32- Ã 32-bit
operations (multiplication instructions take one CPU
clock cycle)
ï· Fast interrupt
ï· Divider (fastest instruction execution takes two CPU
clock cycles)
ï· Fast interrupt
ï· CISC Harvard architecture with 5-stage pipeline
ï· Variable-length instructions: Ultra-compact code
ï· Background JTAG debugging plus high-speed tracing
â Operating voltage
ï· Single 3.3- or 5-V supply; 5-V analog supply is possible
with 3.3-V products
â Low-power design and architecture
ï· Four low-power modes
â On-chip main flash memory, no wait states
ï· 100-MHz operation, 10-ns read cycle
ï· No wait states for reading at full CPU speed
ï· 64-Kbyte/128-Kbyte/256-Kbyte capacities
ï· For instructions and operands
ï· User code programmable via the SCI or JTAG
â On-chip data flash memory
ï· Max. 32 Kbytes, reprogrammable up to 30,000 times
ï· Erasing and programming impose no load on the CPU.
â On-chip SRAM, no wait states
ï· 8-Kbyte/16-Kbyte SRAM
ï· For instructions and operands
â DMA
ï· DTC: The single unit is capable of transfer on multiple
channels
â Reset and supply management
ï· Power-on reset (POR)
ï· Low voltage detection (LVD) with voltage settings
â Clock functions
ï· External crystal oscillator or internal PLL for operation at
8 to 12.5 MHz
ï· Internal 125-kHz LOCO for the IWDT
ï· Detection of main oscillator stoppage (for IEC 60730
compliance)
â Independent watchdog timer
(for IEC60730compliance)
ï· 125-kHz LOCO clock operation
ï· Software is incapable of stopping the robust WDT.
PLQP0112JA-A 20Ã20mm, 0.65mm pitch
PLQP0100KB-A 14Ã14mm, 0.5mm pitch
PLQP0080JA-A 14Ã14mm, 0.65mm pitch
PLQP0064KB-A 10Ã10mm, 0.5mm pitch
â Up to 7 communications interfaces
ï· 1: CAN (compliant with ISO11898-1), incorporating 32
mailboxes
ï· 3: SCIs, with asynchronous mode (incorporating noise
cancellation), clock-synchronous mode, and smart-card
interface mode
ï· 1: I2C bus interface, capable of SMBus operation
ï· 1: RSPI
ï· 1: LIN
â Up to 16 16-bit timers
ï· 8: 16-bit MTU3: 100-MHz operation, input capture,
output compare, two three-phase complementary PWM
output channels, complementary PWM imposing no load
on the CPU, phase-counting mode
ï· 4: 16-bit GPT: 100-MHz operation, input capture, output
compare, four complementary single-phase PWM output
channels, or one three-phase complementary PWM
output channel and one single-phase complementary
PWM output channel, complementary PWM imposing no
load on the CPU, operation linked with comparator (for
counting and control of PWM-signal negation), detection
of abnormal oscillation frequencies (for IEC 60730
compliance)
ï· 4: 16-bit CMT
â Three A/D converter units for 1-MHz operation,
for a total of 20 channels
ï· Three units are capable of simultaneous sampling on
seven channels
ï· Self diagnosis (for IEC60730 compliance)
ï· 8: Two 12-bit ADC units: three sample-and-hold circuits,
double data registers, amplifier, comparator
ï· 12: Single 10-bit ADC unit
â CRC (cyclic redundancy check) calculation unit
ï· Monitoring of data being transferred (for IEC 60730
compliance)
ï· Monitoring of data in memory (for IEC 60730
compliance)
â Up to 61 inputâoutput ports and up to 21 input-only
ports
ï· PORT registers: Monitoring of output ports (for IEC
60730 compliance)
â Operating temp. range
ï· â40ï°C to +85ï°C
R01DS0096EJ0100 Rev.1.00
Apr 20, 2011
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