HD74LVCZ245A Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Octal Bidirectional Transceivers with 3-state Outputs

HD74LVCZ245A
Octal Bidirectional Transceivers with 3–state Outputs
REJ03D0372–0300
(Previous ADE-205-228A (Z))
Rev.3.00
Aug. 18, 2004
Description
The HD74LVCZ245A has eight buffers with three state outputs in a 20 pin package. When (T / R) is high, data flows
from the A inputs to the B outputs, and when (T / R) is low, data flows from the B inputs to the A outputs. A and B bus
are separated by making enable input (OE) high level.
When V_CC is between 0 and 1.5 V, the device is in the high impedance state during power up or power down.
Low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
• V_CC = 2.7 to 5.5 V
• All inputs V_IH (Max) = 5.5 V (@V_CC = 0 to 5.5 V)
• All inputs / outputs V_{I / O} (Max) = 5.5 V (@V_CC = 0 V or output off state)
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.0 V (@V_CC = 3.3 V, Ta = 25°C)
• High impedance state during power up and power down
• Power off disables outputs, permitting live insertion
• High output current ±24 mA (@V_CC = 3.0 to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74LVCZ245AFPEL SOP–20 pin (JEITA) FP–20DAV
FP
HD74LVCZ245ATELL TSSOP–20 pin
TTP–20DAV
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
OE
L
L
H
H: High level
L: Low level
X: Immaterial
Z: High impedance
T/R
L
H
X
Operation
B data to A bus
A data to B bus
Z
Rev.3.00 Aug. 18, 2004 page 1 of 8