HD74LVC16373A Datasheet, PDF (1/10 Pages) Hitachi Semiconductor – 16-bit D-type Transparent Latches with 3-state Outputs

HD74LVC16373A
16-bit D-type Transparent Latches with 3-state Outputs
REJ03D0366–0400Z
(Previous ADE-205-121B (Z))
Rev.4.00
Jul. 29, 2004
Description
The HD74LVC16373A has sixteen D type latches with three state outputs in a 48 pin package. When the latch enable
input is high, the Q outputs will follow the D inputs. When the latch enable goes low, data at the D inputs will be
retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control
input (1G, 2G), all outputs go to a high impedance state, regardless of what signals are present at the other inputs and
the state of the storage elements. Low voltage and high-speed operation is suitable at the battery drive product (note
type personal computer) and low power consumption extends the life of a battery for long time operation.
Features
• V_CC = 2.0 V to 5.5 V
• All inputs V_IH (Max.) = 5.5 V (@V_CC = 0 V to 5.5 V)
• All outputs V_OUT (Max.) = 5.5 V (@V_CC = 0 V or output off state)
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.0 V (@V_CC = 3.3 V, Ta = 25°C)
• High output current ±24 mA (@V_CC = 3.0 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
HD74LVC16373ATEL TSSOP–48 pin
TTP–48DBV
Package
Abbreviation
T
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
Function Table
Inputs
G
LE
D
H
X
X
L
H
L
L
H
H
L
L
X
H: High level
L: Low level
X: Immaterial
Z: High impedance
Q₀: Level of Q before the indicated steady input conditions were established.
Output Q
Z
L
H
Q₀
Rev.4.00 Jul. 29, 2004 page 1 of 9