HD74LV245A Datasheet, PDF (1/10 Pages) Hitachi Semiconductor – Octal Bus Transceivers with 3-state Outputs

HD74LV245A
Octal Bus Transceivers with 3-state Outputs
REJ03D0329–0300Z
(Previous ADE-205-247A (Z))
Rev.3.00
Jun. 24, 2004
Description
The HD74LV245A has eight buffers with three-state outputs in a 20-pin package. When DIR is high, data is
transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A
outputs. The A and B buses are separated by making the enable input (OE) high level. Low-voltage operation is
suitable for battery-powered products (e.g., notebook computers), and the low power consumption extends the battery
life.
Features
• V_CC = 2.0 V to 5.5 V operation
• All inputs V_IH (Max.) = 5.5 V (@V_CC = 0 V to 5.5 V)
• All outputs V_O (Max.) = 5.5 V (@V_CC = 0 V)
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.3 V (@V_CC = 3.3 V, Ta = 25°C)
• Output current ±8 mA (@V_CC = 3.0 V to 3.6 V), ±16 mA (@V_CC = 4.5 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74LV245AFPEL
SOP–20 pin (JEITA) FP–20DAV
FP
HD74LV245ARPEL
SOP–20 pin (JEDEC) FP–20DBV
RP
HD74LV245ATELL
TSSOP–20 pin
TTP–20DAV
T
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
OE
DIR
L
L
L
H
H
X
Note: H: High level
L: Low level
X: Immaterial
Operation
B data to A bus
A data to B bus
Isolation
Rev.3.00 Jun. 24, 2004 page 1 of 9