HD74LV138A Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – 3-to-8 line Decoder / Demultiplexers

HD74LV138A
3-to-8-line Decoder / Demultiplexer
Description
REJ03D0384–0100
Rev.1.00
Aug. 23, 2004
The HD74LV138A has three binary select inputs in a 16 pin package. If the device is enabled these inputs determine
which one of the eight normally high outputs will go low. Two active low and one active high enables are provided to
ease the cascading of decoders. Low voltage and high-speed operation is suitable at the battery drive product (note type
personal computer) and low power consumption extends the life of a battery for long time operation.
Features
• V_CC = 2.0 V to 5.5 V
• All inputs V_IH (Max.) = 5.5 V (@V_CC = 0 V to 5.5 V)
• All outputs V_O (Max.) = 5.5 V (@V_CC = 0 V)
• Typical V_OL ground bounce < 0.8 V (@V_CC = 3.3 V, Ta = 25°C)
• Typical V_OH undershoot > 2.3 V (@V_CC = 3.3 V, Ta = 25°C)
• High output current ±6 mA (@V_CC = 3.0 V to 3.6 V), ±12 mA (@V_CC = 4.5 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
Package
Taping Abbreviation
Abbreviation
(Quantity)
HD74LV138AFPEL
SOP–16 pin (JEITA) FP–16DAV
FP
EL (2,000 pcs/reel)
HD74LV138ATELL
TSSOP–16 pin
TTP–16DAV
T
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
Enable
Select
G1 G2A G2B C
B
A
X
X
H
X
X
X
X
H
X
X
X
X
L
X
X
X
X
X
H
L
L
L
L
L
H
L
L
L
L
H
H
L
L
L
H
L
H
L
L
L
H
H
H
L
L
H
L
L
H
L
L
H
L
H
H
L
L
H
H
L
H
L
L
H
H
H
H: High level
L: Low level
X: Immaterial
Y0
Y1
Y2
H
H
H
H
H
H
H
H
H
L
H
H
H
L
H
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Outputs
Y3
Y4
Y5
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
L
H
H
H
L
H
H
H
H
H
H
Y6
Y7
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
Rev.1.00 Aug. 23, 2004 page 1 of 6