HD74LS42 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – BCD-to-Decimal Decoder

HD74LS42
BCD-to-Decimal Decoder
REJ03D0409–0300
Rev.3.00
Jul.22.2005
This monolithic decimal decoder consists of eight inverters and ten four-input NAND gates. The inverters are
connected in pairs to make BCD input data available for decoding by NAND gates. Full decoding of valid input logic
ensures that all outputs remain off for all invalid input conditions.
Features
• Ordering Information
Part Name
Package Type
Package Code Package
(Previous Code) Abbreviation
HD74LS42P
DILP-16 pin
PRDP0016AE-B _P
(DP-16FV)
HD74LS42FPEL SOP-16 pin (JEITA)
PRSP0016DH-B _FP
(FP-16DAV)
HD74LS42RPEL
SOP-16 pin (JEDEC)
PRSP0016DG-A
(FP-16DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Pin Arrangement
0Y 1
1Y 2
2Y 3
Outputs 3Y ⁴
4Y 5
5Y 6
6Y 7
GND 8
0
1A
2
3B
4
5
6C
7
8D
9
16 V_CC
15 _A
14 _B
13 _C
Inputs
12 _D
11 _9Y
10 _{8Y Outputs}
9 7Y
(Top view)
Rev.3.00, Jul.22.2005, page 1 of 6