HD74LS293 Datasheet, PDF (1/8 Pages) Hitachi Semiconductor – 4-bit Binary Counters

HD74LS293
4-bit Binary Counter
REJ03D0477–0300
Rev.3.00
Jul.15.2005
This counter contains four master-slave flip-flops and additional gating to provide a divide-by-two counter and divide-
by-eight counter. This counter has a gated zero reset. To use the maximum count length of this counter, the B input is
connected to the Q_A output. The input count pulses are applied to input A and the outputs are as described in the
appropriate function table.
Features
• Ordering Information
Part Name
HD74LS293P
Package Type
DILP-14 pin
Package Code
(Previous Code)
PRDP0014AB-B
(DP-14AV)
Package
Abbreviation
P
Taping Abbreviation
(Quantity)
—
Pin Arrangement
NC 1
NC 2
NC 3
QC 4
Outputs
QB 5
NC 6
GND 7
R0(2)
R0(1)
QC
B
QB
A
QA
QD
(Top view)
14 V_CC
13 _R0(2)
12 _R0(1)
11 _B
10 _A
Inputs
9 _QA
Outputs
8 _QD
Function Table
Reset / Count
Reset Input
Outputs
R_{0 (1)}
R_{0 (2)}
Q_D
Q_C
Q_B
Q_A
H
H
L
L
L
L
L
X
Count
X
L
Count
Rev.3.00, Jul.15.2005, page 1 of 7