HD74LS26 Datasheet, PDF (1/4 Pages) Hitachi Semiconductor – Quadruple 2-input High-voltage Interface Positive NAND Gates

HD74LS26
Quadruple 2-input High-voltage Interface Positive NAND Gates
REJ03D0402–0200
Rev.2.00
Feb.18.2005
Features
• Ordering Information
Part Name
Package Type
Package Code Package
(Previous Code) Abbreviation
HD74LS26P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS26FPEL SOP-14 pin (JEITA)
PRSP0014DF-B _FP
(FP-14DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Pin Arrangement
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
(Top view)
14 V_CC
13 _4B
12 _4A
11 _4Y
10 _3B
9 _3A
8 3Y
Circuit Schematic (1/4)
Inputs
A
B
V_CC
20k
8k
Output
Y
4.5k
GND
Rev.2.00, Feb.18.2005, page 1 of 3