HD74LS242 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – Quadruple Bus Transceivers(with three-state outputs)

HD74LS242
Quadruple Bus Transceivers (with three-state outputs)
REJ03D0461–0300
Rev.3.00
Jul.15.2005
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS242P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS242FPEL SOP-14 pin (JEITA) ^PRSP0014DF-B
FP
(FP-14DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Pin Arrangement
GAB 1
NC 2
1A 3
2A 4
3A 5
4A 6
GND 7
14 V_CC
13 _GBA
12 _NC
11 _1B
10 _2B
9 _3B
8 4B
(Top view)
Function Table
Control input
Data port status
GAB
GBA
A
B
H
H
Inverting output
Input
L
H
*
H
L
Isolated
Isolated
L
L
Input
Inverting output
Notes: 1. H; high level, L; low level
2. *; Possibly destructive oscillation may occur if the transceivers are enabled in both directions at once.
Rev.3.00, Jul.15.2005, page 1 of 6