HD74LS155 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – Dual 2-line-to-4-line Decoders/Demultiplexers

HD74LS155
Dual 2-line-to-4-line Decoders / Demultiplexers
REJ03D0440–0200
Rev.2.00
Feb.18.2005
This circuit features dual 1-line-to-4-line demultiprexer with individual strobes and common binary-address input.
When both sections are enabled by the strobes, the common binary-address inputs sequentially select and route
associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting
each of the 4-bit sections as desired. Data applied to input 1C is inverted through its outputs. The inverter following
the 1C data input permits use as a 3-to-8-line decoder or 1-to-8-line demultiplexer without external gating.
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS155P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
Pin Arrangement
Data 1C 1
Strobe 1G 2
Select Input B 3
1Y3 4
1Y2 5
Outputs
1Y1 6
1Y0 7
GND 8
1Y3 ^1G
1C
1Y2
1Y1 B
B
1Y0 ^A
A
2G
2C
2Y3
B 2Y2
B
A _2Y1
A
2Y0
16 V_CC
15 _{Data 2C}
14 _{Strobe 2G}
13 _{Select Input A}
12 _2Y3
11 _2Y2
Outputs
10 _2Y1
9 2Y0
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 6