HD74LS126A Datasheet, PDF (1/4 Pages) Renesas Technology Corp – Quadruple Bus Buffer Gates (with three-state outputs)

HD74LS126A
Quadruple Bus Buffer Gates (with three-state outputs)
REJ03D0431–0300
Rev.3.00
Jul.13.2005
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS126AFPEL SOP-14 pin(JEITA)
PRSP0014DF-B
FP
(FP-14DAV)
HD74LS126ARPEL SOP-14 pin(JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
Pin Arrangement
1C 1
1A 2
1Y 3
2C 4
2A 5
2Y 6
GND 7
(Top view)
14 V_CC
13 _4C
12 _4A
11 _4Y
10 _3C
9 _3A
8 3Y
Function Table
Inputs
C
A
L
X
H
H
H
L
Note: H ; high level,
L ; low level,
X ; irrelevant,
Z ; off (high-impedance) state of a 3-state output
Output
Y
Z
H
L
Rev.3.00, Jul.13.2005, page 1 of 3