HD74LS10 Datasheet, PDF (1/6 Pages) Hitachi Semiconductor – Triple 3-input Positive NAND Gates

HD74LS10
Triple 3-Input Positive NAND Gates
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS10P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS10FPEL SOP-14 pin (JEITA)
PRSP0014DF-B
FP
(FP-14DAV)
HD74LS10RPEL
SOP-14 pin (JEDEC)
PRSP0014DE-A
(FP-14DNV)
RP
Note: Please consult the sales office for the above package availability.
Pin Arrangement
REJ03D0396–0200
Rev.2.00
Feb.18.2005
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
1A 1
1B 2
2A 3
2B 4
2C 5
2Y 6
GND 7
14 V_CC
13 _1C
12 _1Y
11 _3C
10 _3B
9 _3A
8 3Y
(Top view)
Rev.2.00, Feb.18.2005, page 1 of 5