HD74LS09 Datasheet, PDF (1/5 Pages) Hitachi Semiconductor – Quadruple 2-input Positive AND Gates(with Open Collector Outputs)

HD74LS09
Quadruple 2-Input Positive AND Gates
(with Open Collector Outputs)
Features
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74LS09P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS09FPEL SOP-14 pin (JEITA)
PRSP0014DF-B
FP
(FP-14DAV)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
REJ03D0395–0200
Rev.2.00
Feb.18.2005
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
(Top view)
14 V_CC
13 _4B
12 _4A
11 _4Y
10 _3B
9 _3A
8 3Y
Circuit Schematic (1/4)
Inputs
A
B
V_CC
20k
10k 8k
Output
Y
4.5k
GND
Rev.2.00, Feb.18.2005, page 1 of 4