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| HD74LS03 Datasheet, PDF (1/4 Pages) Hitachi Semiconductor – Quadruple 2-input Positive NAND Gates(with Open Colletor Outputs) | |||
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HD74LS03
Quadruple 2-Input Positive NAND Gates
(with Open Collector Outputs)
Features
⢠Ordering Information
Part Name
Package Type
Package Code Package
(Previous Code) Abbreviation
HD74LS03P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS03FPEL SOP-14 pin (JEITA)
PRSP0014DF-B FP
(FP-14DAV)
Note: Please consult the sales office for the above package availability.
Pin Arrangement
REJ03D0390â0200
Rev.2.00
Feb.18.2005
Taping Abbreviation
(Quantity)
â
EL (2,000 pcs/reel)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
(Top view)
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
Circuit Schematic (1/4)
Inputs
A
B
VCC
20k
8k
Output
Y
4.5k
GND
Rev.2.00, Feb.18.2005, page 1 of 3
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