HD74LS01 Datasheet, PDF (1/4 Pages) Hitachi Semiconductor – Quadruple 2-input Positive NAND Gates(with Open Collector Outputs)

HD74LS01
Quadruple 2-Input Positive NAND Gates
(with Open Collector Outputs)
Features
• Ordering Information
Part Name
Package Type
Package Code Package
(Previous Code) Abbreviation
HD74LS01P
DILP-14 pin
PRDP0014AB-B
(DP-14AV)
P
HD74LS01FPEL SOP-14 pin (JEITA)
PRSP0014DF-B _FP
(FP-14DAV)
Note: Please consult the sales office for the above package availability.
REJ03D0388–0200
Rev.2.00
Feb.18.2005
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
Pin Arrangement
1Y 1
1A 2
1B 3
2Y 4
2A 5
2B 6
GND 7
(Top view)
14 V_CC
13 _4Y
12 _4B
11 _4A
10 _3Y
9 _3B
8 3A
Circuit Schematic (1/4)
Inputs
A
B
V_CC
20k
8k
Output
Y
4.5k
GND
Rev.2.00, Feb.18.2005, page 1 of 3