HD74HCT540 Datasheet, PDF (1/9 Pages) Hitachi Semiconductor – Octal Buffers/Line Drivers (with 3-state outputs)

HD74HCT540, HD74HCT541
Octal Buffers/Line Drivers (with 3-state outputs)
REJ03D0668–0200
(Previous ADE-205-558)
Rev.2.00
Mar 30, 2006
Description
The HD74HCT540 is an inverting buffer and the HD74HCT541 is a non-inverting buffer. The 3-state control gate
operates as a two-input NOR such that if either G₁ or G₂ are high, all eight outputs are in the high-impedance state.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: t_pd (A to Y) = 12 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: V_CC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HCT540P
HD74HCT541P
DILP-20 pin
PRDP0020AC-B
P
(DP-20NEV)
HD74HCT540FPEL
SOP-20 pin (JEITA) ^PRSP0020DD-B
FP
HD74HCT541FPEL
(FP-20DAV)
HD74HCT541RPEL SOP-20 pin (JEDEC) ^PRSP0020DC-A
RP
(FP-20DBV)
HD74HCT540TELL
HD74HCT541TELL
TSSOP-20 pin
PTSP0020JB-A
T
(TTP-20DAV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
G₁
G₂
A
L
L
L
L
L
H
H
X
X
X
H
X
H : high level
L : low level
X : irrelevant
Z : off (high-impedance) state of a 3-state output
Output Y
HD74HCT540
HD74HCT541
H
L
L
H
Z
Z
Z
Z
Rev.2.00 Mar 30, 2006 page 1 of 8