HD74HCT241 Datasheet, PDF (1/8 Pages) Hitachi Semiconductor – Octal Buffers/Line Drivers/Line Receivers(with noninverted 3-state outputs)

HD74HCT241
Octal Buffers/Line Drivers/Line Receivers
(with inverted 3-state outputs)
REJ03D0663–0200
(Previous ADE-205-551)
Rev.2.00
Mar 30, 2006
Description
The HD74HCT241 is a noninverting buffer and has one active low enable and one active high enable. Each enable
independently controls 4 buffers.
This device does not have schmitt trigger inputs.
Features
• LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
• High Speed Operation: t_pd (A to Y) = 10 ns typ (C_L = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: V_CC = 4.5 to 5.5 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HCT241P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
HD74HCT241FPEL SOP-20 pin (JEITA) ^PRSP0020DD-B
FP
(FP-20DAV)
HD74HCT241RPEL
SOP-20 pin (JEDEC)
PRSP0020DC-A
(FP-20DBV)
RP
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
Function Table
Inputs
1G
2G
A
H
L
X
L
H
H
L
H
L
H : high level
L : low level
X : irrelevant
Z : off (high-impedance) state of a 3-state output
Output
Y
Z
H
L
Rev.2.00 Mar 30, 2006 page 1 of 7