HD74HC680 Datasheet, PDF (1/7 Pages) Hitachi Semiconductor – 12-bit Address Comparator

HD74HC680
12-bit Address Comparator
REJ03D0641-0200
(Previous ADE-205-527)
Rev.2.00
Mar 30, 2006
Description
The HD74HC680 address comparator simplifies addressing of memory boards and/or other peripheral devices. The
four P inputs are normally hard wired with a preprogrammed address. An internal decoder determines what input
information applied to the 12 A inputs must be low or high to cause a low state at the output (Y). For example, a
positive-logic bit combination of 0111 (decimal 7) at the P input determines that inputs A₁ through A₇ must be low and
that inputs A₈ through A₁₂ must be high to cause the output to go low. Equality of the address applied at the A inputs to
the preprogrammed address is indicated by the output being low.
The HD74HC680 features a transparent latch and a latch enable input (C). When C is high, the device is in the
transparent mode. When C is low, the previous logical state of Y is latched.
Features
• High Speed Operation
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: V_CC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: I_CC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC680RPEL SOP-20 pin (JEDEC)
PRSP0020DC-A
(FP-20DBV)
RP
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
Rev.2.00 Mar 30, 2006 page 1 of 6